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Infomagic - Games of Daze (Summer 1995) (Disc 1 of 2).iso
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jtag.#20
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1995-04-10
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:LIST_OF_FIGURES
~<andtest.pcx>~ : `~AND-Gate Chip for ~INTEST~ Example~`
~<bednails.pcx>~ : `~"Bed-of-Nails" Board Tester~`
~<bidirpin.pcx>~ : `~A Bidirectional ~I/O~ Pin~`
~<bsircell.pcx>~ : `~Boundary Scan Instruction Register Cells~`
~<extest.pcx>~ : `~Chip and Interconnections for ~EXTEST~ Example~`
~<jtgadder.pcx>~ : `~Configuration for Testing the 8-Bit Adder~`
~<scancirc.pcx>~ : `~Boundary Scan Circuitry for a Single ~I/O~ Pin~`
~<scanpath.pcx>~ : `~Adding a Boundary Scan Register to a Logic Circuit~`
~<scncirin.pcx>~ : `~Complete Boundary Scan Cell for an Input Pin~`
~<scncirou.pcx>~ : `~Complete Boundary Scan Cell for an Output Pin~`
~<scnclin1.pcx>~ : `~Minimal Boundary Scan Cell for an Input Pin~`
~<scnclou1.pcx>~ : `~Minimal Boundary Scan Cell for an Output Pin~`
~<subrorg.pcx>~ : `~JTAG Subroutine Library Organization~`
~<tapcnnct.pcx>~ : `~The ~TAP~ Controller and Its Interconnection~`
~<tapcntrl.pcx>~ : `~The Complete ~TAP~ Controller~`
~<tapstate.pcx>~ : `~TAP Controller State Diagram~`
:LIST_OF_PLDasm_FILES
~<add.pds>~ : `~Adder/shift-register design~`
~<add.rpt>~ : `~Adder report file~`
:LIST_OF_C_FILES
~<addtest.c>~ : `~Adder test program~`
~<example.c>~ : `~EXTEST example program~`
~<jtag.c>~ : `~JTAG subroutine library~`
~<jtag.h>~ : `~JTAG subroutine library header~`
**************************************
* Copyright 1995 by XESS Corporation *
* 2608 Sweetgum Drive *
* Apex, NC 27502 *
* USA *
* (919) 387-0076 *
* (800) 549-9377 *
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